AMD Chips: AMD reveals little more about “Siena” and confuses

Genoa, Bergamo, Genoa-X: AMD’s current family of server CPU products based on the Zen 4 architecture consists of these three members. But the fourth member is still pending: Siena. At the Hot Chips 2023 industry conference, AMD confirmed some details about Siena but remained mysterious.

Siena
image: AMD

Siena is still missing from the league

amd siena
image: AMD

So far, AMD’s latest Epyc generation consists of Genoa for the main business with up to 96 full Zen 4 cores, then Bergamo with up to 128 “slim” Zen 4c cores for the cloud sector and Genoa-X as a special solution additional L3 cache.

Number four in the group is called Siena and has been on AMD’s roadmap for some time. Siena is to serve a performance-per-watt platform with up to 64 cores for the edge and telecommunications segments. The market launch is still pending, but there are at least a few more details about Hot Chips 2023.

AMD names TDP classes and confuses

siena amd
image: AMD

A scheme confirms that Siena addresses the DDR5 main memory via six channels (DRAM channel). That’s only half as many as Genoa, which fits in with the more compact SP6 socket, which AMD doesn’t mention per se today. The manufacturer limits the TDP range to 70 watts to 225 watts depending on the model. In terms of performance and command functions, the full program should be offered. Previously, AMD had always spoken of full-fledged Zen 4 cores at Siena.

But the hot chips presentation is confusing on this point. While each member of the “Zen 4 Epyc” family is clearly referred to in the illustrations as “Zen 4” (Genoa, Genoa-X) or “Zen 4c” (Bergamo), the field for Siena simply remains open. The number of chips (CCD) is also not shown exactly in Siena. With “Zen 4” it should be 8 CCDs with 8 cores each in the full configuration.

Corresponding inquiries from the editors remained unanswered with the reference that one could not yet reveal everything about Siena. Likewise, it was not answered in the question and answer session whether Siena was also conceivable with “Zen 4c”.

Rumours about halved L3 cache

Now it remains to be seen to what extent Siena differs from Genoa apart from the socket and memory interface. There was already a hint that Siena could only have half as much L3 cache as Genoa, namely 16 MB instead of 32 MB per 8-core CCD. However, this rumour remains unconfirmed.

The fact that it will come as Epyc 8004 seems more certain based on a public entry by the PCI-SIG.

The rest of the presentation does not reveal any new features, but primarily emphasizes the advantages of the Zen 4 architecture from the manufacturer’s point of view and goes further into the known differences between “Zen 4” and “Zen 4c”.

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